PCIe物理层逻辑部分基础(二)

时间:2019-06-12
本文章向大家介绍PCIe物理层逻辑部分基础(二),主要包括PCIe物理层逻辑部分基础(二)使用实例、应用技巧、基本知识点总结和需要注意事项,具有一定的参考价值,需要的朋友可以参考一下。

Mux会对来自数据链路层的数据(TLP&DLLP)插入一些控制字符,如下图所示。这些控制字符只用于物理层之间的传输,接收端的设备的物理层接收到这些数据后,会将这些控制字符去除,在往上传到其数据链路层

 当然,除了STP、SDP和END之外,还有一些其他的控制字符,如EDB(前面的文章详细介绍过)、SKIP、COM等。如下图所示:

Ordered Sets主要用于链路训练等。每一个Ordered Set都是DW对齐(即四个字节),且Ordered Set开头是一个叫做Comma(COM)的K字符(控制字符),随后包含一些K字符或者D字符(数据字符)。

对于只有一个Lane的PCIe设备来说,Byte Striping并没有什么用,其主要用于多个Lane的数据流分配。x1(一个Lane)和x8(8个Lane)的例子分别如下两张图所示:

除此之外,还有一些其他的规则,主要是针对Mult-Lane的,对于一个Lane并没有什么影响:

x4(4个Lane)需要遵循以下的规则

·   STP and SDP characters are always sent on Lane 0.

·   END and EDB characters are always sent on Lane 3.

·   When an ordered set such as the SKIP is sent, it must appear on all lanes simultaneously.

·   When Logical Idles are transmitted, they must be sent on all lanes simultaneously.

·   Any violation of these rules may be reported as a Receiver Error to the Data Link Layer.

如下图所示:

对于x8、x16、x32需要遵循以下的规则

· STP/SDP characters are always sent on Lane 0 when transmission starts after a period during which Logical Idles are transmitted. After that, they may only be sent on Lane numbers divisible by 4 when sending back‐to‐back packets (Lane 4, 8, 12, etc.).

· END/EDB characters are sent on Lane numbers divisible by 4 and then minus one (Lane 3, 7, 11, etc.).

· If a packet doesn’t end on the last Lane of the Link and there are no more packets ready to go, PAD Symbols are used as filler on the remaining lane numbers. Logical Idle can’t be used for this purpose because it must appear on all Lanes at the same time.

· Ordered sets must be sent on all lanes simultaneously.

· Similarly, logical idles must be sent on all lanes when they are used.

· Any violation of these rules may be reported as a Receiver Error to the Data Link Layer.

x8的例子如下图所示:

0

【博文连载】PCIe扫盲——物理层逻辑部分基础(二)

上一篇文章中提到了Mux会对来自数据链路层的数据(TLP&DLLP)插入一些控制字符,如下图所示。当然,这些控制字符只用于物理层之间的传输,接收端的设备的物理层接收到这些数据后,会将这些控制字符去除,在往上传到其数据链路层。

当然,除了STP、SDP和END之外,还有一些其他的控制字符,如EDB(前面的文章详细介绍过)、SKIP、COM等。如下图所示:

前面的文章中提到过Ordered Sets,其主要用于链路训练等。每一个Ordered Set都是按照DW对齐的(即四个字节),且Ordered Set开头也是一个叫做Comma(COM)的K字符(控制字符),随后包含一些K字符或者D字符(数据字符)。

对于只有一个Lane的PCIe设备来说,Byte Striping并没有什么卵用,其主要用于多个Lane的数据流分配。x1(一个Lane)和x8(8个Lane)的例子分别如下两张图所示:

除此之外,还有一些其他的规则,主要是针对Mult-Lane的,对于一个Lane并没有什么影响:

x4(4个Lane)需要遵循以下的规则:

· STP and SDP characters are always sent on Lane 0.

· END and EDB characters are always sent on Lane 3.

· When an ordered set such as the SKIP is sent, it must appear on all lanes simultaneously.

· When Logical Idles are transmitted, they must be sent on all lanes simultaneously.

· Any violation of these rules may be reported as a Receiver Error to the Data Link Layer.

如下图所示:

对于x8、x16、x32需要遵循以下的规则:

· STP/SDP characters are always sent on Lane 0 when transmission starts after a period during which Logical Idles are transmitted. After that, they may only be sent on Lane numbers divisible by 4 when sending back‐to‐back packets (Lane 4, 8, 12, etc.).

· END/EDB characters are sent on Lane numbers divisible by 4 and then minus one (Lane 3, 7, 11, etc.).

· If a packet doesn’t end on the last Lane of the Link and there are no more packets ready to go, PAD Symbols are used as filler on the remaining lane numbers. Logical Idle can’t be used for this purpose because it must appear on all Lanes at the same time.

· Ordered sets must be sent on all lanes simultaneously.

· Similarly, logical idles must be sent on all lanes when they are used.

· Any violation of these rules may be reported as a Receiver Error to the Data Link Layer.

x8的例子如下图所示:

发送端的扰码器(Scrambler)有一个16-bit的线性反馈寄存器(LFSR,Linear Feedback Shift Register),其实现了以下这个多项式:

具体的功能框图如下图所示:

关于扰码器(Scrambler)还需要遵循以下这些规则:

· 不同的Lane的扰码器必须是同步操作的;

· 扰码器只对TLP和DLLP中的D字符(数据字符)以及逻辑空闲字符(00H,Logical Idle)作用,并不作用于K字符(控制字符)和Ordered Set中的D字符(如TS1、TS2等)

· 兼容性测试字符(Compliance Pattern Characters)并不被扰码;

· COM字符(一种控制字符,不会被扰码)可用于使发送端和接收端的扰码器中的LFSR同时被初始化为FFFFH;

· 扰码器默认时被使能的,但是PCIe Spec允许将其临时禁止,以用于测试用途。

PCIe中用到的K字符(控制字符)如下表所示:

其对应的8b/10b编码如下表所示:

注:其中PAD字符主要用于Mult-Lane中,当一个包的长度比较短,有的Lane可能就没有数据可以发了,这时候可以用PAD字符来填充。如本文的x8的例子所示。

Ordered Sets主要用于链路管理(Link Management)功能。对于Gen1和Gen2的PCIe来说,所有的Ordered Set都以COM作为开头。Ordered Sets是在每个Lane上同步发送的,即每一个Lane都会同时的发送相同的Ordered Sets,因此,Ordered Sets也可以被用于Lane De-skewing。除了链路训练之外,Ordered Sets还被用于时钟容差补偿(Clock Tolerance Compensation)以及更改链路功耗状态(Changing Link Power States)等。

对应的,主要有以下几种Ordered Sets:TS1 and TS2 Ordered Set (TS1OS/TS2OS)、Electrical Idle Ordered Set (EIOS)、FTS Ordered Set (FTSOS)、SKP Ordered Set (SOS)和Electrical Idle Exit Ordered Set (EIEOS)。

原文地址:https://www.cnblogs.com/YINBin/p/11011081.html